माधव प्रौद्योगिकी एवं विज्ञान संस्थान, ग्वालियर (म.प्र.), भारत

माधव प्रौद्योगिकी एवं विज्ञान संस्थान, ग्वालियर (म.प्र.), भारत
Madhav Institute of Technology & Science, Gwalior (M.P.), INDIA

Deemed University

(Declared under Distinct Category by Ministry of Education, Government of India)

NAAC ACCREDITED WITH A++ GRADE

माधव प्रौद्योगिकी एवं विज्ञान संस्थान, ग्वालियर (म.प्र.), भारत

Deemed to be University

(Declared under Distinct Category by Ministry of Education, Government of India)

NAAC ACCREDITED WITH A++ GRADE

Gola Ka Mandir, Gwalior (M.P.) - 474005, INDIA
Ph.: +91-751-2409300, E-mail: vicechancellor@mitsgwalior.in, Website: www.mitsgwalior.in

Department of Electronics Engineering

  2. Faculty Profiles
  3. Dr. Vikas Mahor
Dr. Vikas Mahor

Dr. Vikas Mahor

Designation: Assistant Professor
Qualification: PhD (IIITM)
Area of Interest:  Low Power VLSI Design, Real Time Embedded System Design, Optimization of VLSI architectures using AI
Phone No: +917000771599
E-Mail: This email address is being protected from spambots. You need JavaScript enabled to view it.
  • Education and Qualification:
    • PhD in VLSI Design domain on "FinFET based Circuits  design for Low Power Circuits" from IIITM Gwalior in 2017.
    • MTech in Electronics woth specialization in VLSI Design from IIITM Gwalior in 2012.
    • BE in Electronics Engineering from MITS Gwalior in 2007

     
  • Work Experience:
    • January 2018-Present, Assistant Professor, Department of Electronics Engineering, Madhav Institute of Technology & Science, Gwalior
      Currently working as an assistant professor at MITS, Gwalior.
    • May 2017-December 2017, Assistant Professor, Electronics & Communication Engineering Department, Amity School of Engineering
      & Technology, Amity University, Gwalior
      Before joining my M.Tech. program i worked as a faculty in Amity School of Engineering & Technology, Amity University Gwalior, for a short duration of 6 months. July 2012 - May 2017,
    • Regular PhD Research Scholar at Indian Institute of Information and technology Gwalior I worked as a Full Time Ph.D. research scholar in the VLSI dept. under
      the guidance of Dr. Manisha Pattanaik. I have submitted my PhD thesis. Apart from research i was also responsible for teaching assistantship at IIIT Gwalior.
    • Feb 2010 - Aug 2010, Faculty at SRIIT Gwalior
      Before joining my M.Tech. program i worked as a faculty in electronics and comm. department, SRIIT for a short duration of 6 months.
    • Aug 2007 - Jan 2010, Project Engineer at WIPRO Technologies, Bengaluru
      I worked as a project engineer at WIPRO technologies for a period of 2 years and 5 months. My responsibilities at WIPRO were software development and my field of expertise was JAVA and JSP/JSF web pages. At WIPRO i worked under two different projects which were developed for clients CITI CANADA and HUGHES TELEMATICS.
  • Research Supervision:

    MTech Thesis Supervised:

    1. Sristhi Agarwal, "Image Filtering With Iterative Wavelet Transform Based Compression".

    2. Pooja Pandey, "A Novel Microstrip MIMO Antenna Using Ladder Shape Parasitic Element for Low Mutual Coupling".

    3. Bulbul Bandil, "Modified IDCP Technique for Image Defogging".

    4. Nivendita Bhandari, "DESIGN OF MICROSTRIP ANTENNA FOR WIDEBAND AND WLAN APPLICATIONS"
  • Research Projects, Consultancy & Patents:

    • Research Project:

      "Memristor based low power Hybrid semiconductor memory design" under IRS 2021 Scheme, Madhav Institute of Technology & Science, Gwalior.
  • Publications:

     

    1. Mahor, V. and Pattanaik, M. (2014) ‘Highly robust Finfet based wide Fan-in dynamic OR gate with dynamic threshold voltage control’, in 2014 International Conference on Circuits, Systems, Communication and Information Technology Applications (CSCITA). IEEE, pp. 42–47.

    2. Mahor, V., Chouhan, A. and Pattanaik, M. (2012a) ‘A novel process variation tolerant wide fan-in dynamic OR gate with reduced contention’, in 2012 5th International Conference on Computers and Devices for Communication (CODEC). IEEE, pp. 1–4.

    3. Mahor, V. and Pattanaik, M. (2015b) ‘Novel NBTI aware approach for low power FinFET based wide fan-in domino logic’, Journal of Low Power Electronics. American Scientific Publishers, 11(2), pp. 225–235.

    4. Mahor, V., Chouhan, A. and Pattanaik, M. (2012b) ‘A process variation tolerant low contention keeper design for wide fan-in dynamic OR gate’, in 2012 International Symposium on Electronic System Design (ISED). IEEE, pp. 151–153.

    5. Mahor, V., et al. (2011) ‘A novel low power noise tolerant high performance dynamic feed through logic design technique’, in 2011 International Symposium on Electronic System Design. IEEE, pp. 118–123.

    6. Mahor, V. and Pattanaik, M. (2015a) ‘Low leakage and highly noise immune FinFET-based wide fan-in dynamic logic design’, Journal of Circuits, Systems and Computers. World Scientific Publishing Company, 24(05), p. 1550073.

    7. Chouhan, A., Mahor, V. and Pattanaik, M. (2012) ‘A novel delay minimization technique for low leakagewide fan-in domino logic gates’, in 2012 5th International Conference on Computers and Devices for Communication (CODEC). IEEE, pp. 1–4.

    8. Bhardwaj, N., Mahor, V. and Pattanaik, M. (2015) ‘Robust FinFET based highly noise immune power gated SRAM circuit design’, in 2015 International Conference on Communication Networks (ICCN). IEEE, pp. 310–316.

    9. Chaturvedi, M. et al. (2016) ‘FinFET-Based Low Power Address Decoder under Process Variation’, in 2016 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS). IEEE, pp. 274–277.

    10. Kumar, V., Mahor, V. and Pattanaik, M. (2016) ‘Novel ultra low leakage FinFET based SRAM cell’, in 2016

      IEEE International Symposium on Nanoelectronic and Information Systems (iNIS). IEEE, pp. 89–92.

    11. Mahor, V., et al. (2016) ‘Low Stand-by Power and Process Variation Tolerant FinFET based SRAM cell’, in 2016 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS). IEEE, pp. 268–273.

    12. Mahor, V. and Pattanaik, M. (2018) ‘A state-of-the-art current mirror-based reliable wide fan-in FinFET domino OR gate design’, Circuits, Systems, and Signal Processing. Springer US, 37, pp. 475–499.

    13. Mahor, V. and Pattanaik, M. (2017b) ‘An Aging-Aware Reliable FinFET-Based Low-Power 32-Word× 32-bit Register File’, Circuits, Systems, and Signal Processing. Springer US New York, 36(12), pp. 4789–4808.

    14. Mahor, V. and Pattanaik, M. (2017a) ‘A NBTI tolerant technique for FinFET based wide fan-in dynamic logic’, in 2017 Conference on Information and Communication Technology (CICT). IEEE, pp. 1–6.

    15. Mahor, V., et al. (2017) ‘Impact of NBTI on 8T FinFET based SRAM cell’, in 2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE). IEEE, pp. 362–365.

    16. Mahor, V,. et al. (2014) ‘An efficient fine grained access control scheme based on attributes for enterprise class applications’, in 2014 International Conference on Signal Propagation and Computer Technology (ICSPCT 2014). IEEE, pp. 273–278.

    17. Mahor, V. and Raghuwanshi, S. (2013) ‘Taguchi’s loss function based measurement of mobile ad-hoc network parameters under AODV routing protocol’, in 2013 Fourth International Conference on Computing, Communications and Networking Technologies (ICCCNT). IEEE, pp. 1–7.

    18. Kundu, S., Mahor, V. and Gupta, R. (2018) ‘A highly accurate fire detection method using discriminate method’, in 2018 International Conference on Advances in Computing, Communications and Informatics (ICACCI). IEEE, pp. 1184–1189.

    19. Mahor, V., Agrawal, S. and Gupta, R. (2019) ‘Image Filtering with Iterative Wavelet Transform Based Compression’, in Advances in Computing and Data Sciences: Third International Conference, ICACDS 2019, Ghaziabad, India, April 12--13, 2019, Revised Selected Papers, Part II 3. Springer Singapore, pp. 250–262.

    20. Bandil, B., Tharke, V. V. and Mahor, V. (2018) ‘Survey Paper on Image Defogging Using Various Techniques’, Recent Trends in Parallel Computing, 5(1), pp. 20–26.

    21. Mahor, V. and Singh, M. (2020) ‘A Novel Meta-material Based Mirco-strip Patch Antenna’, in Intelligent Computing Applications for Sustainable Real-World Systems: Intelligent Computing Techniques and their Applications. Springer International Publishing, pp. 230–236.

    22. Bandil, B., Mahor, V. and Thakare, V. V. (no date) ‘Modified IDCP Technique for Accurate Image Defogging’, Journal of Radio and Television Broadcast, 3(3).

    23. Pooja Pandey, P. K. S., Vikas Mahor (2019) ‘A Close-Packed Tri-Band Multi- Input Multi- Output Antenna System With DGS’, International Journal of Microwave Engineering and Technology. Journals Pub, 5(2), pp. 1–7.

    24. Nivedita, Mahor, V. and Thakare, V. V. (2021) ‘Multi-strip Structured Dual Band Antenna for WLAN Applications’, Journal of Xi’an University of Architecture & Technology. Journal of Xi’an University of Architecture & Technology, 13(7), pp. 952–957.

    25. Vikas Mahor and Prachi Singh (mar # ‘ 18’, note=IN Patent 202,211,011,056 2022) ‘MACHINE LEARNING-BASED RECOMMENDATION SYSTEM FOR CROP FARMING’.

    26. Mahor, V., et al. (2022) ‘Analysis and performance enhancement of newly designed solar based heat pump for water heating application’, Energy Reports. Elsevier, 8, pp. 302–312.

    27. Mahor, V., et al. (2022) ‘Vibration compensation for railway track displacement monitoring system using biomedical image processing concept’, The Journal of Engineering, 2022(11), pp. 1076–1085.

    28. Pandey, P., Mahor, V. and Singhal, P. K. (2019) ‘Design of Microstrip MIMO Antenna Using Ladder Shape Parasitic Element for Low Mutual Coupling’, International Journal of Microwave & Optical Technology, 14(6).

    29. Choubey, H. et al. (2022) ‘A Deep Learning Based Neural Network for Detection of Epileptic Seizure’, in International Conference on Sustainable and Innovative Solutions for Current Challenges in Engineering & Technology. Springer Nature Singapore Singapore, pp. 155–162.

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